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Course Code: 
CSE 425
Course Period: 
Autumn
Course Type: 
Area Elective
Credits: 
3
Theoric: 
3
Practice: 
0
Laboratory Hour: 
0
ECTS: 
5
Prerequisite Courses: 
Course Language: 
English
Course Objectives: 
This practical, hands-on course introduces digital logic design, system-level design using current state of the art in EDA tools used by professionals in VLSI field today. Students learn to design large-scale logic circuits from fundamental building blocks and methods. This course focuses mostly on the front-end techniques involved in ASIC/FPGA design flow, but also gives a brief introduction of CMOS process and CMOS logic. Through a series of laboratory exercises using FPGA boards, students will acquire skills in the design/verification/implementation of digital systems.
Course Content: 

The what/why/how of ICs, FPGAs, and ASIC Flow, MOS Transistors, CMOS Logic, CMOS Process. Verilog and basic digital design principles. Data paths, adders, multipliers, memory, embedded-processors, IPs. Behavioral design specification, system partitioning, register-transfer design, hardware description languages (Verilog, VHDL), pipelining, parallelism, resource sharing, hand shaking, design verification, and simulation, high level verification languages, code coverage, high-level synthesis, FPGA prototyping, gate-level timing, test generation, design for testability. Laboratory exercises, one Term Project.

Course Methodology: 
1: Lecture, 2: Question-Answer, 3: Lab, 4: Case-study
Course Evaluation Methods: 
A: Testing, B: Experiment, C: Homework, D: Project

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