This laboratory was established in 2007 to support research and development in microelectronics. Same year it became a Europractice member. Its microchip design base comprises 12-seats of industry-standard Cadence CAD toolset in addition to design kits of numerous silicon foundries worldwide. Accessible fabrication technologies include all CMOS nodes down to 28 nanometer. Constructed as a Faraday cage, and equipped with a low-noise power network, the facility is suitable for extremely sensitive characterization tasks. Frequencies up to 8 gigahertz and currents down to femtoamps are routinely measured on the chips designed in house and prototyped at a selected foundry. Design experience is concentrated mostly on analog and mixed-signal chips, especially in the emerging application areas such as energy harvesters and implantable stimulators.